Depth · Precision · Professional
Engineering-grade semiconductor analysis: Die Shot, advanced packaging, CMOS process, memory and process node evolution.
- Reports
- 22
- Die Shots
- 319
- Manufacturers
- 34
Blog & Articles
Industry observations, technical reviews and product updates from working engineers.
Two new tools: die layout and block harvesting yield
One tool explores how a die fits on a wafer. The other estimates how many dies can be recovered by disabling defective modules. Here is how to use them and how the calculations work.
Updates and upcoming plans
Platform updates and plans for upcoming analysis.
Calculator updates are back
The logic density and SRAM calculators are back, with their formulas and reference data checked again.
Why a chip has that exact die area — the design SPEC question
Thoughts on chip specifications, yield and die-area trade-offs.
Apple M-series cost per die
Estimated manufacturing cost per die, from M1 to M4.
March 2026 video plans
Planned videos for March 2026.
Analysis Reports
Per-chip teardown PDFs covering process, packaging, and cell structure — all in one document.
Apple A20 Pro
Apple A20 Pro chip analysis report.
Huawei Kirin 9050 with Logic Folding
Huawei Kirin 9050 chip analysis and Logic Folding research.
MediaTek Dimensity 9600 Pro
MediaTek Dimensity 9600 Pro chip analysis report.
Qualcomm Snapdragon 8 Elite Extreme Gen6
Qualcomm Snapdragon 8 Elite Extreme Gen6 chip analysis report.
Li Auto M100-Ultra On-Chip Analyze
理想 M100-Ultra 片上分析（Dieshot）
Intel Crescent Island GPU – PCB Analysis
Physical-layer teardown of Intel's Crescent Island data-center AI inference GPU — PCB stack-up, power delivery, GPU package/die estimate, and the LPDDR5X memory subsystem, benchmarked against NVIDIA/AMD reference parts.
Dieshot Gallery
High-resolution die imagery, side-by-side across vendors, processes and eras. One click to zoom in.
