A first look at Rapidus 2HP
Rapidus 2HP process data inferred from publicly available Synopsys PDK information.
Kurnal Insights
Synopsys has made some Rapidus 2HP PDK names public, giving us a glimpse of the process parameters.
Logic libraries
There are two library options:
Ultra High Density (UHD)
- Cell height: 138 nm
- Gate pitch: 45 nm
- Gate length: 8 nm
High Speed (HP)
- Cell height: 184 nm
- Gate pitch: 45 nm
- Gate length: 8 nm
Threshold-voltage options
- Standard VT
- Low VT
- Ultra Low VT
- Super Low VT
Density calculation
Cell height and gate pitch can be used to estimate logic density:
| Rapidus 2HP | UHD | HP |
|---|---|---|
| Gate length | 8 nm | 8 nm |
| Cell height | 138 nm | 184 nm |
| Gate pitch | 45 nm | 45 nm |
| Logic density | 237.31 MTr/mm² | 177.98 MTr/mm² |